The process of converting continuous analog signal into discrete time digital signal is called Analog to Digital Conversion(ADC). And the device used for this process is called Analog to Digital Converters.
Types of ADC converters:
1.Successive approximation ADC
2.Ramp type ADC
3.Dual Ramp type ADC
1.Successive approximation ADC:
The Successive-Approximation or Cyclic DAC, which successively constructs the output during each cycle. Individual bits of the digital input are processed each cycle until the entire input is accounted for.
Working mechanism :
The output from the DAC are programmed to be all initially low, then DAC is at zero count. The MSB output bit of digital to analog converter is caused to go high and the comparator is sensed for a state changed. If the change occurs the MSB output from the digital to analog converter is returned to low, as the digital to analog converter output voltage was greater than the input voltage, if no change occurs the MSB output is left high. The next lower DAC output bit is caused to go high and the comparator is sensed for a state change. If a change occurs the bit is returned to low, as the new DAC output voltage was greater than the input voltage. This process of changing the next lower DAC output bit and sensing the comparator for a change is continued through the LSB of the DAC. When the process is complete, the final DAC output states represent the digital equivalent of the step just below the actual input voltage magnitude. The whole requires a maximum of only 2 pulses to complete the entire analog to digital conversion.
Thus , Successive approximation ADC uses a comparator to successively narrow a range that contains the input voltage. At each successive step, the converter compares the input voltage to the output of an internaldigital to analog converterwhich might represent the midpoint of a selected voltage range. At each step in this process, the approximation is stored in a successive approximation register (SAR). For example, consider an input voltage of 6.3 V and the initial range is 0 to 16 V. For the first step, the input 6.3 V is compared to 8 V (the midpoint of the 0–16V range). The comparator reports that the input voltage is less than 8V, so the SAR is updated to narrow the range to 0–8V. For the second step, the input voltage is compared to 4 V (midpoint of 0–8). The comparator reports the input voltage is above 4V, so the SAR is updated to reflect the input voltage is in the range 4–8V. For the third step, the input voltage is compared with 6 V (halfway between 4 V and 8 V); the comparator reports the input voltage is greater than 6 volts, and search range becomes 6–8V. The steps are continued until the desired resolution is reached.
2.Ramp type ADC:
Aramp-compare ADCproduces asaw-tooth signalthat ramps up or down then quickly returns to zero. When the ramp starts, a timer starts counting. When the ramp voltage matches the input, a comparator fires, and the timer's value is recorded. Timed ramp converters require the least number oftransistors. The ramp time is sensitive to temperature because the circuit generating the ramp is often a simpleoscilllator. There are two solutions: use a clocked counter driving a DACand then use the comparator to preserve the counter's value, or calibrate the timed ramp. A special advantage of the ramp-compare system is that comparing a second signal just requires another comparator, and another register to store the voltage value. A very simple (non-linear) ramp-converter can be implemented with a microcontroller and one resistor and capacitor.Vice versa, a filled capacitor can be taken from an integrator, time-to-amplitude converter, phase detector, sample and holdcircuit, orpeak and holdcircuit and discharged. This has the advantage that a slow comparatorcannot be disturbed by fast input changes.
At the beginning of the conversion, the counter is set to zero and a gated clock pulse would be enabled to allow the converter to increment until the output of the DAC exceeds the analogue input when the output of the comparator changes and inhibits the clock.
The output of the DAC is ramp or stair case as shown below,
Conversion time= Vin/Vref*2N *T, where N is the number of bits and T is the time period of the clock pulse.
3.Dual Ramp type ADC:
The dual ramp signal consists of components as shown below:
It has integrator which produces a ramp signal from constant input analog voltage Vin. Then there is comparator to drive the AND gate whose another input is clock pulse of certain frequency. The gate drives an up-counter which on certain conditions sends the signal is control logic. The control logic then switches the input from +Vin to –Vref .
When “Vin” is fed to the integrator , it produces a ramp signal whose slope is equal to ‘Vin/RC’. The gate will open in this case. So, the up-counter will count upto its full scale(i.e-To 111 for 3 bit) and then resets. As it resets, it sends the signal to the conditional logic to switch the input known voltage(-Vref). Now, the voltage will increase with the slope of +Vref/RC.
When negative voltage reaches zero then the gate will be closed and up-counter will stop counting. The digital code(word) seen on the counter will be equivalent to the input analog voltage Vin. When Vin is fed to the input, the voltage ‘Vc’ rises to certain level at fixed time (when up-counter counting is full-scale) . say, the voltage is Vp.Now, when the voltage –Vref connected to the input, Vc starts increasing with constant slope ‘Vref/RC’.Higher the value of Vin, higher will be the peak value Vp during the first phase of fixed time ‘Tint’.then, longer will be the time for Vp to reach zero level and higher will be the up-counter count.
From the figure,
Now, Conversion time is given by,
4.Parallel (Flash) ADC:
Parallel ADC is called as Flash ADC. Its response is very fast. it converts analog signal into digital signal using parallel set of comparators. It is formed of a series of comparators, each one comparing the input signal to a unique reference voltage. The comparator outputs connect to the inputs of a priority encoder circuit, which then produces a binary output,.As its conversion time is very fast it is called as flash ADC. n-bit Flash ADC consist of parallel combination of 2n-1 comparators. Outputs of all comparators are connected to an encoder. Following figure shows circuit diagram of parallel ADC or flash ADC.
Working Principle Of Flash ADC:
Analog voltage is applied to non inverting terminals of all comparators using a single line. Reference voltage is applied to inverting terminals of comparators using divider circuit. Each comparator produces digital output in the form of 1 or 0. If unknown analog voltage is greater than reference voltage comparator produces high logic. If analog voltage is less than reference voltage then comparator produces low logic i.e. 0. Thus all parallel comparator produces digital representation of analog voltage in the form of zero and one. These outputs of comparator are then applied to the fast encoder. Encoder converts those zeros and once into binary number and produces digital binary output. For example, lets see below table. When unknown voltage is 5 i.e. lies between 4.375 &5.625 is applied to the flash ADC, first four encoders produces output ‘1’ and last three encoders produces output ‘0’. Encoder converts this ‘1111000’ comparator output into ‘100’ binary number as digital output. Table below shows the outputs of comparators and encoder for a 3 bit flash ADC. The range of operation is given as 0-10V.